Step recovery diodes are used to produce pulses and other waveforms with extremely fast rise and fall times (about 30 picoseconds). Such diodes are also commonly used in harmonic frequency multipliers because of their high efficiency in generating harmonics.
A step recovery diode is a specialized kind of PIN diode. Generally, a PIN diode is characterized by an undoped intrinsic ("i") region sandwiched between a heavily p-doped ("p") region and a heavily n-doped ("n") region. As used herein, "undoped" means not intentionally doped, "lightly doped" means a dopant has been added to a doping level less than about 10.sup.17 dopant particles cm.sup.-3 (per cubic centimeter), and "heavily doped" means a dopant has been added to a doping level on the order of 10.sup.17 cm.sup.-3 or more. A heavily doped region will be indicated herein by a superscripted "+" sign appended to the p or n designator.
The step recovery diode is a specialized adaptation of this general PIN diode structure. The step recovery diode, by virtue of its unique application, is subject to special design constraints that are different from those applicable to other kinds of PIN diodes. For example, a step recovery diode is operated in both forward and reverse bias and therefore both its forward and reverse characteristics are of great concern. In fact, as will be explained in detail presently, a step recovery diode performs its special function while transitioning from forward to reverse bias. A step recovery diode should display a large diffusion capacitance when in forward bias, a small depletion capacitance when in reverse bias, and a rapid transition therebetween.
More particularly, the intrinsic region of a step recovery diode must generally be made of a semiconductor material which is characterized by a long minority carrier lifetime (at least several nanoseconds) so as to maximize the storage of charge when in forward bias and thereby provide as large a diffusion capacitance as possible. Also, the intrinsic region must be very thin, typically less than about 10,000 .ANG., and the junctions between the intrinsic region and the other regions must be characterized by abrupt doping profiles (transition widths less than about 300 .ANG.) to provide abrupt carrier confinement at the junctions, both of which tend to ensure a rapid transition between forward and reverse bias. Compromises must be made, for example between configuring the diode structure so as to maximize the speed of transition or to maximize the reverse diode breakdown voltage, to achieve the best overall performance in a given circuit.
Note: 10,000 .ANG. (Angstroms)=1 micron (micrometer). For convenience, unless otherwise indicated all dimensions herein are expressed in Angstroms.
Light generating and detecting diodes together comprise another popular adaptation of the general PIN diode structure. The design constraints to which these diodes are subject are so fundamentally different from the constraints applicable to other diodes, especially step recovery diodes, that design principles and improvements which may be very useful when applied to light generating and emitting diodes often have little or no pertinence to the design of step recovery diodes, and vice versa.
For example, the design of light detecting diodes, also known as photodiodes, and light generating diodes, a category which includes light-emitting diodes (commonly known as LEDs) and laser diodes, is constrained by optical as well as electrical requirements, resulting in important physical and structural differences between these and other diodes. In constrast, a step recovery diode does not perform an optical function and hence most optical properties of semiconductor materials and structures that are critical to the design of light generating and detecting diodes are of but little concern to a designer of a step recovery diode.
Also, photodiodes and light generating diodes are always operated in only one mode. A light generating diode is operated only in forward bias for carrier injection to produce light. A photodiode is operated only in reverse bias so that photogenerated charge carriers are quickly swept out of the photosensitive region.
In addition, the intrinsic region of a photodiode is the photosensitive part and is usually thicker than the absorption length of the incident photons so as to make the device as sensitive as possible. In some applications sensitivity is sacrificed for increased speed, in which case the intrinsic region may be as thin as about 10,000 .ANG.. However, even though a high-speed photodiode may have an intrinsic region as thin as the intrinsic region of a step recovery diode, photodiodes and step recovery diodes are distinct devices and are constructed differently. A photodiode would not function effectively as a step recovery diode and most design criteria for photodiodes are not useful in designing step recovery diodes.
The operation of a step recovery diode will now be explained, and differences between the capacitance characteristics of step recovery diodes and those of other diodes will be considered. In abstract terms, a step recovery diode may be viewed as a practical realization of an ideal nonlinear capacitor. An ideal nonlinear capacitor would have a relatively large capacitance when forward biased and a relatively small capacitance when reverse biased. The capacitance-voltage (C-V) characteristic of such a device is illustrated in FIG. 1.
A step recovery diode is characterized by abrupt junctions between adjacent regions. As noted above, an "abrupt" junction is any junction that is less than about 300 .ANG. thick; typically such a junction is about 100 .ANG. thick. A junction between adjacent regions of chemically similar materials is referred to herein as a "homojunction" whereas a junction between adjacent regions of chemically dissimilar materials is referred to as a "heterojunction".
A typical example of a homojunction step recovery diode according to the prior art is shown in schematic cross-section in FIG. 2. In a silicon-based embodiment, a p.sup.+ region 21 on the order of 5,000 .ANG. thick has a dopant concentration of about 10.sup.20 cm.sup.-3 to 10.sup.22 cm.sup.-3. An i (intrinsic) region 22 is less than about 10,000 .ANG. thick. An n.sup.+ region 23 on the order of 5,000 .ANG. thick has a dopant concentration of greater than about 10.sup.18 cm.sup.-3. The p.sup.+ and n.sup.+ regions are as heavily doped as possible in order to minimize minority carrier injection into these regions.
Under forward bias, the junction between the p.sup.+ and i regions and the junction between the i and n.sup.+ regions are forward biased. A forward bias is applied by connecting a positive terminal of a voltage source to the p region and a negative terminal of the voltage source to the n region. This results in diffusion--that is, injection of relatively large concentrations of holes (positive charge carriers) from the p.sup.+ region and electrons (negative charge carriers) from the n.sup.+ region (on the order of 10.sup.18 cm.sup.-3) into the intrinsic region.
The high concentration of both types of charge carriers throughout the intrinsic region effectively stores both types of carriers in that region. This may be considered as equivalent to charging a capacitor; the higher the concentration of carriers in the intrinsic region, the higher the capacitance of the diode. This capacitance occurs as a result of diffusion of charge carriers under forward bias and therefore is referred to as forward bias or "diffusion" capacitance.
Applying a reverse bias draws the charge carriers out of the intrinsic region; specifically, the holes are drawn back into the p.sup.+ region and the electrons are drawn back into the n.sup.+ region, thereby depleting the intrinsic region of mobile charge carriers. After the carriers have been removed from the intrinsic region, there is practically no current flow. Thus, under reverse bias, the diode may be considered as behaving much like a parallel plate capacitor having a spacing between the plates substantially equal to the thickness of the intrinsic region. This capacitance occurs as a result of depletion of charge carriers from the intrinsic region and is referred to as reverse bias or "depletion" capacitance. The depletion capacitance is substantially smaller than the diffusion capacitance.
Both the depletion capacitance and the diffusion capacitance are important characteristics of a step recovery diode. Optimum performance is achieved when the diffusion capacitance is large, the depletion capacitance is small, and the time to make the transition from diffusion to depletion capacitance is as small as possible. These requirements are such that generally a compromise must be made. Maximizing diffusion capacitance, for example, results in non-optimum transition time and depletion capacitance.
In contrast, in a photodiode the depletion capacitance must be minimized but the diffusion capacitance is not of great importance because in normal operation the device is never operated in forward bias; the designer is therefore free to configure the structure so as to minimize the depletion capacitance without concern for the diffusion capacitance. In a light generating diode the diffusion capacitance must be minimized to facilitate high speed modulation but the depletion capacitance is not of concern because the device is not operated in reverse bias, and the designer again is free to concentrate on structuring the device in a way that will optimize the important capacitance characteristic without having to temper the design according to a conflicting need to also optimize the other capacitance characteristic.
The operation of a step recovery diode as a step generator will now be described with reference to FIGS. 3A and 3B. A forward bias is applied to a step recovery diode 31 by a bias voltage source 32 having a positive terminal connected to an anode 313 (p.sup.+ region) of the diode 31 through a common return 33 and a negative terminal connected to a cathode 314 (n.sup.+ region) of the diode through a current-limiting resistor 310. This forward bias results in a steady-state current i.sub.d flowing through the diode.
An input voltage E.sub.in is applied to the diode by a step voltage source 34 having a negative terminal connected to the anode through the common return 33 and a positive terminal connected to the cathode through a DC blocking capacitor 37. The voltage source 34 is depicted as an ideal voltage source 35 and a standard source impedance 36 of 50 ohms. The generator circuit provides an output voltage E.sub.out at an output port 311 through a DC blocking capacitor 38. A load across the output is represented by a resistor 312.
Prior to time t.sub.1, the input voltage E.sub.in is zero. A steady-state DC voltage provided by the bias source appears across the diode but is blocked by the capacitor 38 and therefore the output voltage E.sub.out is also zero.
At time t.sub.1 the input voltage E.sub.in begins to change from zero to a positive value, counteracting the forward bias voltage from the source 32 and thereby reverse biasing the diode. In other words, as the voltage E.sub.in begins to develop across the diode, there is a build-up of an electric field in the intrinsic region 22. This switches the current i.sub.d from a forward current to a reverse current. In an ordinary diode there is little or no stored charge; therefore, the reverse current would be negligibly small and the reverse bias voltage would immediately appear across the diode, causing the output voltage E.sub.out to closely track the input voltage E.sub.in. (The reverse current is due to thermally generated electron-hole pairs in the intrinsic region; that is, this current is space-charge limited).
But as discussed above, the build-up of the electric field across the intrinsic region of the step recovery diode produces a drift of holes from the intrinsic region toward and into the p.sup.+ region 21 and a drift of electrons toward and into the n.sup.+ region 23. This flow of charge carriers makes the diode appear to have a relatively low impedance, much as if the diode were a large capacitor discharging a stored charge (this is the effect of the large diffusion capacitance characteristic of the diode). Thus, the effective impedance experienced by the voltage source 35 remains substantially constant at the value of the source impedance 36. This relatively high conductivity of the diode, due to the stored carriers in the intrinsic region, effectively short-circuits the output port 311 so that E.sub.out remains substantially zero until all of the stored charge has been removed from the intrinsic region.
The voltage across the diode remains essentially zero until nearly all of the stored charge has left the intrinsic region. Between times t.sub.2 and t.sub.3 the remaining charge carriers (the "tail end" of the stored charge) exit the intrinsic region, resulting in a sudden increase in the resistivity of the intrinsic region. The current flowing through the diode drops to a very small reverse current. This in turn produces a sharp step transition in the output voltage E.sub.out. The time t.sub.R of the step transition of E.sub.out (the interval of time between t.sub.2 and t.sub.3) is much shorter than the time of the step transition in the applied step voltage E.sub.in. This can be seen graphically by comparing the relatively long step transition of E.sub.in (most of the interval of time between t.sub.1 and t.sub.2) with the relatively short step transition t.sub.R of E.sub.out.
The duration of the time between t.sub.1 and t.sub.2 is largely determined by the amount of stored charged which in turn is determined by the carrier lifetime and the magnitude of the forward bias current.
The duration of the step transition time t.sub.R depends both on the device structure and the external circuit with which it interacts. According to Moll et. al., "Physical Modeling of the Step Recovery Diode for Pulse and Harmonic Generation Circuits," Proceedings of the IEEE, Vol 57, No. 7, July 1969, pages 1250-1259, the duration of t.sub.R is governed by several factors including:
(i) the transit time T.sub.t of minority carriers through the intrinsic region (T.sub.t in turn is determined by the saturated drift velocity of the minority carriers through the intrinsic region and the thickness of the intrinsic region);
(ii) the RC time constant T.sub.RC, where R is the parallel combination of the source impedance 36 and the load resistance 312 and C is the reverse bias of depletion capacitance of the diode (the current-limiting resistance 310 is much larger than the other resistances and therefore has a negligible effect on T.sub.RC);
(iii) the amount of minority carrier diffusion into the p.sup.+ and n.sup.+ regions; and
(iv) the abruptness of the doping profile gradings between the p.sup.+ and i regions and between the i and n.sup.+ regions.
Disregarding the third and fourth factors (minority carrier diffusion and non-abrupt doping profiles, both of which broaden the width of the tail end of the charge carrier distribution being swept out of the intrinsic region and therefore tend to increase the minimum achievable step transition time t.sub.R), t.sub.R is given by EQU t.sub.R =(T.sub.t.sup.2 +T.sub.RC.sup.2).sup.1/2.
Most conventional step recovery diodes are fabricated on silicon using vapor phase epitaxy, ion beam implantation and diffusion techniques. The minority carrier lifetimes in the intrinsic region of a silicon-based step recovery diode are relatively long, typically longer than about five nanoseconds, resulting in a relatively high diffusion capacitance. However, a structure produced by these techniques typically exhibits an intrinsic region thickness greater than 5,000 .ANG. and p.sup.+ to i and i to n.sup.+ dopant level transitions (profile gradings) greater than 2,500 .ANG.. In addition, minority carriers diffuse from the intrinsic region into the p.sup.+ and n.sup.+ regions to a diffusion depth of as much as several microns depending on dopant concentration (this problem is depicted graphically in FIG. 4B, to be discussed presently). Both of these effects broaden the effective thickness of the intrinsic region, resulting in a minimum achievable step transition time t.sub.R of about 30 picoseconds (ps). The maximum output voltage achievable with such a device has been around 15 volts.
It has been proposed to increase the maximum output voltage that can be obtained from a step recovery diode by making the diode out of a semiconductor compound made of a group III material such as gallium and a group V material such as arsenic. However, simulation studies have shown that, in a gallium arsenide (GaAs) step recovery diode having charge carrier concentrations in the intrinsic region of magnitudes comparable to those found in a silicon step recovery diode, radiative recombination would limit the carrier lifetime to less than about three nanoseconds, thereby reducing the diffusion capacitance.
The problem with radiative recombination is explained as follows. If a positive and a negative charge carrier encounter one another, they combine, their respective electric charges neutralize each other, and both of them are thereupon considered as having ceased to exist. This process is referred to as "recombination". Radiative recombination is accompanied by emission of a burst of energy in the form of a photon; nonradiative recombination is not accompanied by the emission of a photon.
Nonradiative recombination occurs at comparable rates in both silicon and GaAs semiconductor material, but radiative recombination occurs at a much higher rate in GaAs than in silicon. Therefore, charge carriers tend to last longer in silicon than in GaAs.
In addition, photons that are emitted during radiative recombination in the intrinsic region tend to generate minority carriers in the adjacent p.sup.+ and n.sup.+ regions, thereby aggravating the problem of minority carrier diffusion into those regions.
FIGS. 4A-4D show simulation results for a hypothetical GaAs p.sup.+ -i-n.sup.+ homojunction step recovery diode having a structure similar to the silicon diode shown in FIG. 2 but fabricated of GaAs. In particular, as best shown in FIG. 4B this hypothetical GaAs diode has a p.sup.+ region 41 analogous to the region 21 of FIG. 2, an i region 42 analogous to the region 22 of FIG. 2 and an n.sup.+ region 43 analogous to the region 23. More particularly, FIG. 4A is an energy band diagram of the GaAs diode at high forward bias V.sub.F =1.4 volts, FIG. 4B shows the charge carrier concentrations within the diode at this forward bias, FIG. 4C presents an energy band diagram of the same diode under a reverse bias of V.sub.R =-5 volts, and FIG. 4D presents corresponding carrier concentrations.
The problem of minority carrier diffusion under forward bias is depicted graphically in FIG. 4B. A solid line 44 represents positive charge carriers at a high level in the p.sup.+ region 41, at a slightly lower level in the i region 42, and extending into the n.sup.+ region 43. Similarly a dashed line 45 depicts a large diffusion of minority negative carriers extending from the intrinsic region 42 into the p.sup.+ region 41.
These minority carrier diffusions increase the transition time t.sub.R of the diode with increasing forward bias because the minority carrier distributions extend an undesirably long distance into the n.sup.+ and p.sup.+ regions, increasing the effective thickness of the intrinsic region. As previously discussed, this increases the time needed to sweep out the forward bias stored charge, increasing the transition time. Therefore, both the n.sup.+ and p.sup.+ regions are doped to a level of about 10.sup.19 cm.sup.-3, the highest concentrations possible, in order to minimize minority carrier diffusion.
FIG. 4B was developed as part of the simulation study of GaAs, but qualitatively the minority charge carrier diffusion that it depicts is similar to the minority charge carrier diffusion that occurs in silicon step recovery diodes under forward bias conditions.
From the foregoing it will be apparent that there remains a need for a practical step recovery diode that has a shorter step transition time than has been achievable and that can produce higher output voltages than have been attained.